PPoPP 2016
Sat 12 - Wed 16 March 2016 Barcelona, Spain

Overview

The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. Recently, transactional memory has crossed two important thresholds. First, IBM and Intel are now shipping processors with hardware support for transactional memory (TM). Second, the C++ Standard Committee has been working intensively to integrate TM as a new language feature. On the other hand, the post-release discovery of an erratum in Intel’s hardware TM implementation has brought upfront the need for effective TM verification mechanisms. Overall, these developments highlight the demand for continued high quality transactional memory research.

Transact 2016, the eleventh in its series, will provide a forum to present and discuss the latest research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel and distributed computing platforms.

Accepted Papers

Title
Ensuring Irrevocability in Wait-free Transactional Memory
TRANSACT
Link to publication File Attached
Implicit Acceleration of Critical Sections via Unsuccessful Speculation
TRANSACT
Link to publication File Attached
Investigating the Performance of Hardware Transactions on a Multi-Socket Machine
TRANSACT
Link to publication File Attached
Lerna: Transparent and Effective Speculative Loop Parallelization
TRANSACT
Link to publication File Attached
Lock Holder Preemption Avoidance via Transactional Lock Elision
TRANSACT
Link to publication File Attached
On Extending TM Primitives using Low Level Semantics
TRANSACT
Link to publication File Attached
PHyTM: Persistent Hybrid Transactional Memory
TRANSACT
Link to publication File Attached
The Influence of Malloc Placement on TSX Hardware Transactional Memory
TRANSACT
Link to publication File Attached
The Mimir Approach to Transactional Output
TRANSACT
Link to publication File Attached

Call for Papers and Lightning Talks

The workshop seeks papers on topics related to all areas of software and hardware for transactional computing. Specific topics of interest include but are not limited to:

  • Run-time systems
  • Hardware support
  • Applications, workloads, and test suites
  • Experience reports
  • Language mechanisms and semantics
  • Memory models
  • Transactions for non-uniform and non-cache coherent memory systems (e.g., NUMA, GPUs, RDMA, distributed transactions)
  • Formal verification
  • Speculative concurrency
  • Conflict detection and contention management
  • Debugging and tools
  • Static analysis and compiler optimizations
  • Checkpointing and failure atomicity
  • Persistence and I/O
  • Nesting and exceptions

Papers should present original research. As transactional memory spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. Papers focused on foundations should indicate how the work can be used to advance practice; papers on experiences and applications should indicate how the experiments reinforce or reflect principles.

Lightning talks

Following last year’s successful experience, we have set aside time for “Lightning talks”. Anyone may sign up to give a lightning talk, which must be no more than 5 minutes, ideally shorter.

Lightning talks should be seen as an instrument to trigger discussion among the attendees of the event. Possible topics of lightning talks proposals include, but are not limited to:

  • emerging/overlooked/overly explored/interdisciplinary/provocative research questions
  • negative/surprising/early results
  • results stemming from different research areas with potential relevance for the Transactional Memory domain.

To sign up ahead of time, send mail to the PC chair (romano@inesc-id.pt). You may sign up for multiple talks on different topics. If there is time, we will also allow signups during the workshop.

Submissions

Please use EasyChair to submit a paper to TRANSACT!.

Papers must be submitted in PDF, and be no more than 8 pages in standard two-column SIGPLAN conference format including figures and tables but not including references. Shorter submissions are welcome. The submissions will be judged based on the merit of the ideas rather than the length. Submissions must be made through the on-line submission site. Final papers will be available to participants electronically at the meeting, but to facilitate resubmission to more formal venues, no archival proceedings will be published, and papers will not be sent to the ACM Digital Library.

Authors will have the option of having their final paper accessible from the workshop website. Authors must be familiar with and abide by SIGPLAN’s republication policy, which forbids simultaneous submission to multiple venues and requires disclosing prior publication of closely related work.

At the discretion of the program committee and with the consent of the authors, particularly worthy papers may be recommended for a special journal issue.

For any additional information, do not hesitate to contact the PC Chair, Paolo Romano romano@inesc-id.pt

Travel Awards

PPoPP 2016 has received funds to support travel to Barcelona for student authors of Transact’16 papers. Please contact the PC chair (Prof. Paolo Romano) if you intend to apply for these funds.

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Sat 12 Mar

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11:00 - 12:30
Irrevocability and Conflict AvoidanceTRANSACT at Menorca
11:00
30m
Talk
The Mimir Approach to Transactional Output
TRANSACT
Tingzhe Zhou Lehigh University, Michael Spear Lehigh University
Link to publication File Attached
11:30
30m
Talk
On Extending TM Primitives using Low Level Semantics
TRANSACT
Mohamed M. Saad , Roberto Palmieri Virginia Tech, Ahmed Hassan Virginia Tech, Binoy Ravindran Virginia Tech
Link to publication File Attached
12:00
30m
Talk
Ensuring Irrevocability in Wait-free Transactional Memory
TRANSACT
Jan Kończak Poznań University of Technology, Paweł T. Wojciechowski Poznań University of Technology, Rachid Guerraoui EPFL, Switzerland
Link to publication File Attached
Title Authors Slides
PHyTM: Persistent Hybrid Transactional Memory Hillel Avni, Trevor Brown slides
The PRIDE Approach to Transactional Output Tingzhe Zhou, Michael Spear slides
On Extending TM Primitives using Low Level Semantics Mohamed M. Saad, Roberto Palmieri, Ahmed Hassan, Binoy Ravindran slides
Ensuring Irrevocability in Wait-free Transactional Memory Jan Kończak, Paweł T. Wojciechowski, Rachid Guerraoui slides
Investigating the Performance of Hardware Transactions on a Multi-Socket Machine Trevor Brown, Alex Kogan, Yossi Lev, Victor Luchangco slides
The Influence of Malloc Placement on TSX Hardware Transactional Memory Dave Dice, Tim Harris, Alex Kogan, Yossi Lev, Victor Luchangco slides
Lock Holder Preemption Avoidance via Transactional Lock Elision Dave Dice, Tim Harris slides
Implicit Acceleration of Critical Sections via Unsuccessful Speculation Joseph Izraelevitz, Alex Kogan, Yossi Lev slides
Lerna: Transparent and Effective Speculative Loop Parallelization Mohamed M. Saad, Roberto Palmieri, Binoy Ravindran slides