How much power does a core actually need to function correctly? For a fixed clock frequency, the minimal voltage at which a device functions correctly can vary along several dimensions: across circuits within a device, across heterogeneous components on the same chip, across nominally identical devices, or even across the same device over time.

What if each circuit could adaptively seek out its own minimal safe voltage level? Each core could gradually lower its voltage for as long as it continues to operate correctly. When the core detects errors, it rolls back to the application’s most recent safe state, raises the voltage level, and resumes the application.

This talk describes recent exploratory work using hardware transactional memory as an “autombile air bag” when an adaptive core lowers its voltage level too aggressively, and speculates on future research directions.