PPoPP 2016 (series) / WPMVP 2016 (series) / - 3rd Workshop on Programming Models for SIMD/Vector Processing /
A new SIMD iterative connected component labeling algorithm
This talk presents a new multi-pass iterative algorithm for Connected Component Labeling. The performance of this algorithm is compared to those of State-of-the-Art two-pass direct algorithms. We show that thanks to the parallelism of the SIMD multi-core processors and an activity matrix that avoids useless memory access, such a kind of algorithm has performance that comes closer and closer to direct ones. This new tiled iterative algorithm has been benchmarked on four generations of Intel Xeon processors: 2×4- core Nehalem, 2×12-core Ivy-Bridge, 2×14-core Haswell and 57-core Knight Corner. Macro meta-programming was used to design a unique code for SSE, AVX2 and KNC SIMD instruction set.
Sun 13 Mar Times are displayed in time zone: Greenwich Mean Time : Belfast change
Sun 13 Mar
Times are displayed in time zone: Greenwich Mean Time : Belfast change
09:00 - 10:30: Session 1WPMVP at Mallorca Chair(s): Jan EitzingerUniversity of Erlangen-Nuremberg, Germany | |||
| 09:00 - 09:15 Talk | Opening Words WPMVP Jan EitzingerUniversity of Erlangen-Nuremberg, Germany | ||
| 09:15 - 10:00 Talk | Keynote - AnyDSL: Building Domain-Specific Languages for Productivity and Performance WPMVP | ||
| 10:00 - 10:30 Talk | A new SIMD iterative connected component labeling algorithm WPMVP Lionel LacassagneUniversity Paris 6 | ||
